1. Field of the Invention
The invention relates generally to a method of manufacturing a flash memory device capable of solving a problem of a cell source resistance and a problem of isolating a field oxide film in a peripheral region. More particularly, the invention relates to a method of manufacturing a flash memory device by which the depth of the trenches in the cell region and the peripheral region is differently formed upon a trench device isolation process.
2. Description of the Prior Art
Recently, in the flash memory device, a rapid read speed is required as the voltage of the peripherals is reduced and the cell speed of the memory cell is increased. In particular, a voltage drop effect is generated due to an operation of a page/burst mode in which several data are sent at a time upon a read operation. This voltage drop greatly affects the speed of the cell.
The flash memory device is usually formed by sequentially performing gate etch, self-aligned (SA) etch, self-aligned source (SAS) etch, and ion implantation for forming source and drain (S/D implantation. Arsenic (As) is used as a material ,for source and drain implantation. FIG. 1 is a cross sectional view of the flash memory device after ion implantation for source and drain is performed using As. From FIG. 1, it can be seen that a portion 104 into which ions are implanted is formed on a semiconductor substrate 102.
A method in which the source of the cell is commonly used in the flash memories and a single contact every 16 or 32 of the flash memory cell is used to connect them, is employed. Also, upon the read operation in the operation of the flash memory device, the source is grounded and the drain is applied with a voltage of about 0.8V. If the source resistance is increased, the voltage lower than the reference voltage is actually applied to the drain due to a back-bias effect. This causes to reduce the cell current. As a result, there occurs a problem that the read speed of the flash memory device is delayed. This problem in the read speed adversely affects the characteristics of the product, which greatly affects a competition in the market.
Recently, in manufacturing the flash memory device, a shallow trench isolation (STI) process has been used. As seen from FIG. 2, if As is implanted at a given angle, it has been known that As is actually implanted with a reduced amount of about ⅓ through ⅕ compared to the actually implanted dose or energy. In other words, if As is implanted with an given angle at the dose of 3E15 atoms/cm2 and energy of 30 KeV, as indicated by a reference numeral 30, this is same to a case where As is implanted at the dose of 7.8E14 atoms/cm2 and energy of about 7.8 KeV, as indicated by a reference numeral 32. Therefore, the source resistance is increased compared to a predicted resistance, which results in degrading the characteristics of the product.
In order to solve these problems, a method of reducing the entire length of the resistor, i.e., a method of reducing the depth of the trench has been used in the prior art. If this method is used, however, though a partial effect on the cell may be generated, there is a problem in device isolation of the field oxide film in the peripheral region. In particular, in case of the flash memory device, as the cells are driven by a high voltage, the isolation problem of the field oxide film in the peripheral region becomes further severe. As a result, this problem adversely affects the operating characteristic of the flash memory device. Therefore, though the trench profile was used in order to reduce the cell source resistance, the trench profile is changed in a process of forming a sacrificial oxide film after the trench device isolation process.
The present invention is contrived to solve the above problems and an object of the present invention is to provide a method of manufacturing a flash memory device by which the depth of trenches in a cell region and a peripheral region can be differently formed by controlling an etch angle and time depending on the width of a field oxide film upon a trench device isolation process of the flash memory device.
In order to accomplish the above object, a method of manufacturing a flash memory device according to the present invention, is characterized in that it comprises the steps of sequentially depositing a pad oxide film and a pad nitride film on a semiconductor substrate, when trenches are formed by etching the pad nitride film, the pad oxide film and the substrate using a mask for forming a device isolation film, forming trenches having a different depth in a cell region and in a peripheral by controlling an etch angle and etch target depending on the width of the trench, wherein the trench in a peripheral region is formed to be deeper than the trench in a cell region, depositing trench insulating films on the entire surfaces to bury the trenches with the trench insulating films, performing a chemical mechanical polishing process and a strip process for the trench insulating films to form the trench insulating film upper structures of which are protruded, forming a well region through an ion implantation process, and forming a tunnel oxide film, a floating gate, a dielectric film and a control gate.